Masterclock TCDS Series Dokumentacja Pobierz pdf (Strona 22)

AD1974 Data Sheet

Rev. D | Page 22 of 24

ALRCLK

ABCLK

SDATA1

DATA MUST BE VALID

AT THIS BCLK EDGE

MSB

6614-060

Figure 16. I

S Pipeline Mode in ADC Serial Data Transmission

(Applicable in Stereo and TDM Useful for High Frequency TDM Transmission)

1 2 ... 17 18 19 20 21 22 23 24

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Masterclock TCDS Series Dokumentacja Strona 22